Monday, March 18, 2013

Templating with for Circuit Design

When describing circuits to computers, have you ever felt that the languages for EDA, be it SPICE or Verilog or whatever are not flexible enough ? Well, I have. Coding regular structures such as adders, ring oscillators, multipliers etc. with popular languages in EDA can be a pain. A couple of weeks ago, I was checking out a synthesized ring oscillator to build a time-to-digital converter (TDC) [1]. Building long chains of inverters by hand is drudgery and SPICE does precious little to help in automation. At first, I tried writing a python program with string manipulations that generates verilog code, but quickly came to realize that its way more natural to have snippets of python inside verilog. Now, that needs a bit of work to get going. Thankfully, web developers solved this problem long ago for programmatically generating HTML. I used 's templating engine to write verilog code that describes a ring oscillator (in case you are surprised by the fact that I used verilog rather than SPICE, the whole idea is to create the TDC with standard cells).